High efficiency, parallel, power conversion system with adaptive dynamic efficiency optimization

ABSTRACT

A system for controlling a plurality of power converters in a power system so as to turn each of the plurality of power converters into an ON state or an OFF state as a function of a sensed input power and a sensed output power such that one or more of the plurality of power converters in the ON state are operating in an optimal power efficiency range.

RELATED PATENT APPLICATIONS

The present application is a continuation of U.S. patent applicationSer. No. 16/669,267, now U.S. Pat. No. 11,165,328, filed on Oct. 30,2019 and entitled HIGH EFFICIENCY, PARALLEL, POWER CONVERSION SYSTEMWITH ADAPTIVE DYNAMIC EFFICIENCY OPTIMIZATION, which claims priority toU.S. provisional patent application Ser. No. 62/752,893, filed on Oct.30, 2018, and claims priority to U.S. provisional patent applicationSer. No. 62/817,651, filed on Mar. 13, 2019, and where the contents ofthe foregoing applications are incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention is related to power conversion systems, and moreparticularly is related to power conversion systems that optimize thepower usage of the system components.

Conventional power conversion systems are known and typically employmagnetic-type power converters for converting a power parameter, such ascurrent or voltage, from a first level to a second level. Typicalmagnetic type power converters employ a transformer to convert the powerbetween the first and second levels. As such, if the power is increasedfrom the first level to the second level, then the power converter iscalled a step-up power converter. Likewise, if the power is decreasedfrom the first level to the second level, then the power converter iscalled a step down power converter.

A drawback of using conventional magnetic type power converters is thatthey typically employ windings disposed about a core, and hence thereare power losses associated therewith. Further, traditional magnetictransformers and inverters have an efficiency curve which typicallypeaks at around 50% of rated load and then starts to drop off as theload moves toward the maximum rated load. The traditional transformersalso suffer similarly efficiency drops at low load. A primary cause ofinefficiency at low load is power loss due to operating controlcircuitry and device drivers configured to switch high-capacitance gatesof large switching transistors; and a primary cause of inefficiency athigh load is resistive losses at high currents.

SUMMARY OF THE INVENTION

The present invention is directed to a power conversion system thatemploys a controller to control the operation of an array of powerconverters. The controller controls the power converter array byensuring that a suitable number of power converters are operating in anoptimal power efficiency range while concomitantly providing power to aload. The controller in combination with a selection unit optionallyselects the specific frequency of operation for each of the powerconverters. The power conversion system can also include an optionalcomparison unit for comparing the measured instantaneous power providedby the system to a threshold level to determine if the system needs toby-pass the controller and instruct the power converters in the OFFstate to discharge pre-stored power directly to the load.

The present invention is directed to a system for controlling aplurality of power converters in a power system comprising a pluralityof power converters forming an array for converting power from a firstpower level to a second power level, where the power converters arecoupled to a common input power line on an input side for providinginput power at the first power level and a common output power line onan output side for providing power to a load at the second power level.The system also includes a controller coupled to the plurality of powerconverters for controlling a power output of the power converters, aninput sensing circuit for sensing the input power on the common inputpower line and transmitting an input power signal to the controller, andan output sensing circuit for sensing the output power on the commonoutput power line and transmitting an output power signal to thecontroller. The controller is configured to control each of theplurality of power converters so as to turn each of the plurality ofpower converters into an ON state or an OFF state as a function of thesensed input power and the sensed output power such that one or more ofthe plurality of power converters in the ON state are operating in anoptimal power efficiency range.

According to the present invention, the power converters can include aswitched capacitor type DC-DC step -down power converter for convertingthe power from the first power level to the second power level, wherethe second power level is lower than the first power level.Alternatively, the power converters can include a DC-DC power converter,a DC-AC power converter, or a AC-DC power converter. According toanother practice, each of the power converters can include a pluralityof capacitors having stored power associated therewith. The capacitorscan be optionally electrically connected in a parallel arrangement, aserial arrangement, a parallel-serial arrangement, or a series-parallelarrangement.

According to another aspect of the present invention, the controller caninclude a processor, a look up table, and a memory for storinginstructions that when received by the processor instructs the processorto determine the power across one or more of the plurality of powerconverters, and based on the power of the one or more power converters,accessing the look up table and determining therefrom which of theplurality of power converters the controller places in the ON state andthe OFF state.

According to another aspect, the controller can include a memory unitfor storing instructions for controlling the plurality of powerconverters, a signal conditioner for conditioning the input power signaland the output power signal and generating a conditioned output powersignal, an AC-DC converter for converting the conditioned output powersignal to a DC conditioned output power signal, and a processor forprocessing the DC conditioned output power signal and for generatingbased on the stored instructions controller output signals forcontrolling one or more of the plurality of power converters so as toturn the plurality of power converters into the ON state and the OFFstate. The conditioned output power signal can include a conditionedoutput voltage component and a conditioned output current component, andthe processor includes a filter unit for averaging the conditionedoutput voltage component and the conditioned output current component ofthe conditioned output power signal, a power determination unit fordetermining the power across one or more of the plurality of powerconverters based on an average of the conditioned output voltagecomponent and the conditioned output current component and generating apower determination output signal, a hysteresis unit for reducing noisein the power determination output signal, and a look-up table forstoring information associated with a plurality of power levels acrossat least one of the plurality of power converters correlated to aplurality of power converters to be placed in the ON state or the OFFstate. As such, the controller generates one or more output controlsignals for turning one or more of the plurality of power convertersinto the ON state and the OFF state based on the look-up table. Thepower levels across the controller correspond to the power requirementsof the load.

The signal conditioner can include a voltage conditioning unit forbuffering the input voltage component and the output voltage componentto remove noise therefrom and to scale the input voltage component andthe output voltage component to a selected voltage level for use by thecontroller, and a current conditioning unit for filtering the inputcurrent component and the output current component. The currentconditioning unit can include a low pass filter for filtering the inputand output current components.

According to still another aspect, the system can include a signalconditioner for conditioning the input power signal and the output powersignal and generating a conditioned output power signal, a clockselection unit coupled to the controller and to the plurality of powerconverters for varying a frequency of one or more of the plurality ofpower converters, and a comparison unit coupled to the controller and tothe selection unit. The controller generates a first output controlsignal, and the comparison unit receives the conditioned output powersignal and the first output control signal, and in response generates anoutput comparison signal. Specifically, the comparison unit receives theconditioned output power signal and the first output control signal, andin response generates an output comparison signal when a valueassociated with the conditioned output power signal is greater than avalue associated with the first output control signal.

Further, the output comparison signal is transmitted to the clockselection unit, which in turn transmits an output signal to theplurality of power converters, and in response to the output signal fromthe clock selection unit the stored power of the one or more capacitorsof the power converters in the OFF state is transmitted to the commonoutput power line. The clock selection unit comprises one or more clockgenerators for generating the frequency and a selector for selecting thefrequency.

The present invention is also directed to a method of controlling aplurality of power converters in a power system, comprising providing aplurality of power converters forming an array for converting power froma first power level to a second power level, providing a controllercoupled to the plurality of power converters for controlling a poweroutput of the power converters, sensing with an input sensing circuitcoupled to the controller and to an input power line input power on theinput power line and transmitting an input power signal to thecontroller, and sensing with an output sensing circuit coupled to thecontroller and to an output power line output power on the output powerline and transmitting an output power signal to the controller, andcontrolling each of the plurality of power converters so as to turn eachof the plurality of power converters into an ON state or an OFF state asa function of the sensed input power and the sensed output power suchthat one or more of the plurality of power converters in the ON stateare operating in an optimal power efficiency range.

The power converters preferably include a switched capacitor type DC-DCstep -down power converter for converting the power from the first powerlevel to the second power level, where the second power level is lowerthan the first power level.

According to another aspect, the method includes determining poweracross one or more of the plurality of power converters, and based onthe power of the one or more power converters, accessing a look up tableand determining therefrom which one of the plurality of power convertersthe controller places in the ON state and the OFF state.

The controller can include a memory unit for storing instructions forcontrolling the plurality of power converters, a signal conditioner forconditioning the input power signal and the output power signal andgenerating a conditioned output power signal, an AC-DC converter forconverting the conditioned output power signal to a DC conditionedoutput power signal, and a processor for processing the DC conditionedoutput power signal and for generating based on the stored instructionscontroller output signals for controlling one or more of the pluralityof power converters so as to turn the plurality of power converters intothe ON state and the OFF state.

According to another aspect, the conditioned output power signal has aconditioned output voltage component and a conditioned output currentcomponent, and the processor comprises a filter unit for averaging theconditioned output voltage component and the conditioned output currentcomponent of the conditioned output power signal, a power determinationunit for determining the power across one or more of the plurality ofpower converters based on an average of the conditioned output voltagecomponent and the conditioned output current component and generating apower determination output signal, a hysteresis unit for reducing noisein the power determination output signal, and a look-up table forstoring information associated with a plurality of power levels acrossat least one of the plurality of power converters correlated to aplurality of power converters to be placed in the ON state or the OFFstate. The controller generates one or more output control signals forturning one or more of the plurality of power converters into the ONstate and the OFF state based on the look-up table.

According to another aspect of the method of the invention, the systemis adapted for conditioning the input power signal and the output powersignal and generating a conditioned output power signal, varying afrequency of one or more of the plurality of power converters, andcomparing a value associated with a control signal generated by thecontroller with a value associated with the conditioned output powersignal, and when the value of the conditioned output signal is greaterthan the value of the control signal, generating a comparison signal.Further, in response to the comparison signal, transmitting stored powerin one or more capacitors of the power converters in the OFF state tothe output power line.

The controller generates a first output control signal, and the methodfurther includes conditioning with a signal conditioner the input powersignal and the output power signal and generating a conditioned outputpower signal, varying with a clock selection unit a frequency of one ormore of the plurality of power converters, and comparing with acomparison unit the conditioned output power signal and the first outputcontrol signal, and in response generates an output comparison signalwhen a value associated with the conditioned output power signal isgreater than a value associated with the first output control signal.

Still further, the method includes transmitting the output comparisonsignal to the clock selection unit, which in turn transmits an outputsignal to the plurality of power converters, and in response to theoutput signal from the clock selection unit, transmitting stored powerof one or more capacitors associated with each of the plurality of powerconverters in the OFF state to the output power line. The clockselection unit includes one or more clock generators for generating thefrequency and a selector for selecting the frequency.

BRIEF DESCRIPTION OF DRAWINGS

These and other features and advantages of the present invention will bemore fully understood by reference to the following detailed descriptionin conjunction with the attached drawings in which like referencenumerals refer to like elements throughout the different views. Thedrawings illustrate principals of the invention and, although not toscale, show relative dimensions.

FIG. 1 is a schematic circuit diagram of a power conversion system forsupplying power from an array of power converters to a load according tothe teachings of the present invention.

FIG. 2 is a schematic block diagram of the power converters of FIG. 1according to the teachings of the present invention.

FIG. 3 is a schematic block diagram of the controller of FIG. 1according to the teachings of the present invention.

FIG. 4 is a schematic block diagram of the signal conditioner of FIG. 3according to the teachings of the present invention.

FIG. 5 is a graphical representation of the power efficiency curve ofthe power converters of FIG. 1 according to the teachings of the presentinvention.

FIG. 6 is a second embodiment of the power conversion system of thepresent invention employing an optional comparison unit and an optionalselection unit.

FIG. 7 is a schematic block diagram of the selection unit of FIG. 6according to the teachings of the present invention.

FIG. 8 is a graphical representation of the power efficiency curve ofthe power converters of FIG. 1 operating at different frequenciesaccording to the teachings of the present invention.

FIG. 9 is a schematic flow chart illustrating the steps involved whenoperating the power conversion systems of FIGS. 1 and 6 according to theteachings of the present invention.

FIG. 10 is a graphical representation of the power efficiency curve ofthe power converters of FIG. 1 employing the adaptive dynamic efficiencyoptimization (ADEO) technique with the system not employing the ADEO anda conventional magnetic type power converter according to the teachingsof the present invention.

FIG. 11 is a schematic flow chart illustrating the steps involved whenchanging the frequency of operation of one or more of the powerconverters of the power conversion systems of FIGS. 1 and 6 according tothe teachings of the present invention.

FIG. 12 is a schematic flow chart illustrating the steps involved whenemploying the instantaneous limited reserve (ILR) feature of the powerconversion systems of FIGS. 1 and 6 according to the teachings of thepresent invention.

FIG. 13 is a sample look up table suitable for use with the powerconverter system of the present invention.

DETAILED DESCRIPTION

As used herein, the term “power converter” is intended to include anytype of converter capable of converting power or associated powercomponents, including voltage and current, from one level to another.The power converters can include magnetic or inductive type convertersand non-magnetic type converters, such as switched capacitor type powerconverters. Further, the power converters as contemplated herein caninclude DC-DC converters, DC-AC converters, and AC-DC converters, andcan also include step up power converters and step-down powerconverters. Also, the DC-DC converters can include traditionalinductor-based DC-DC converters, such as the buck or boost convertersknown in the art of DC-DC converters.

Switched capacitor type power converters are capable of reaching peak ornear peak efficiency earlier in the load curve relative to magnetic typepower converters and tend to maintain efficiency closer to peak ratingsfor longer periods in the load curve. However, the switched capacitortype power converters tend to drop in power efficiency before and afterpeak efficiency has been reached. That is, the switched capacitor typepower converter efficiency can be close to peak efficiency across awider range of operating points but still has a distinct efficiencycurve with peak efficiency somewhere within the rated load range anddecreased efficiency ratings as the load gets farther from the point atwhich peak efficiency is achieved. The present inventors have realizedthat there is an optimal efficiency and power range in which to operatethe power converters.

As used herein, the term “power” can refer to a voltage, current orwell-known electrical power that corresponds to an electrical currentpassing through a voltage potential (VI) and expressed in Watts.

The present invention is directed to a power conversion system 10, asillustrated in FIG. 1. The illustrated power conversion system 10includes a plurality of power converters, and preferably a plurality ofswitched capacitor type power converters 12 a, 12 b, and 12 n forming apower converter array 20 that are coupled to a common input power line14 and to a common output power line 16. Those of ordinary skill in theart will readily recognize that any suitable number of power converterscan form part of the power converter array 20 based on the overall powerrequirements of the system 10 and the load 26. The power converters 12a-12 n are coupled to the common output power line 16 and arrangedrelative to each other in a parallel electrical configuration. An inputsensing circuit 22 is coupled to the input power line 14 and an outputsensing circuit 24 is coupled to the output power line 16. An externalload 26 is coupled to the output power line 16. A controller 30 iscoupled to the input sensing circuit 22 and to the output sensingcircuit 24, as well as to the power converters 12 a-12 n.

The power converters are preferably step down power converters, althoughthey could be step up power converters if desired. The power converters12 a, 12 b, 12 n are adapted to convert the first input voltage Vinprovided on the input power line 14 to a second lower voltage Voutprovided on the output power line 16. The input sensing circuit 22senses the input voltage and current levels provided on the input powerline 14 and provides these power measurements to the controller 30.Similarly, the output sensing circuit 24 senses the output current andvoltage levels provided on the output power line 16 and also providesthese power measurements to the controller 30. The input and outputsensing circuits 22, 24 can thus include suitable and well known voltageand current sensors or detectors for measuring or sensing the voltageand current on the input and output power lines 14, 16 as is known inthe art. The controller 30 processes the input voltage and current datafrom the sensing circuits 22, 24 to determine the instantaneous power ofthe system and provides control signals to the power converters 12 a, 12b, 12 n for controlling or regulating the power converters. The load 26is coupled to the output power line 16 and corresponds to any load onthe system 10. The load can be, for example, any type of resource,hardware or device that requires power for operation.

The illustrated power converters 12 a, 12 b, 12 n can be any type ofpower converter, and preferably include a switched capacitor type powerconverter. Further, the power converters can be either DC-DC converters,DC-AC converters, or AC-DC converters, and are preferably DC-DCconverters. An example type of switched capacitor type power convertersuitable for use with the power conversion system 10 of the presentinvention includes the MxC200 DC-DC power converter manufactured byHelix Semiconductor, USA. FIG. 2 illustrates a simplified example of asuitable power converter for use as part of the power converter array20. The illustrated power converter 12 a can include selected powerconversion circuitry (not shown) in addition to one or more capacitors.The capacitors can be incorporated into the power converter or can beassociated with the power converter, such as a fly capacitor. Accordingto one embodiment, the power converter can include a series ofcapacitors 36 a, 36 a, and 36 c that can be arranged in any suitableelectrical arrangement depending upon the level or magnitude of the stepdown voltage that the converters are designed to achieve. According toone practice, the capacitors can be capacitors associated with theMuxCapacitor topology of Helix Semiconductor. As such, the capacitorscan be electrically connected in a parallel arrangement, a serialarrangement, a parallel-serial arrangement, or preferably aseries-parallel arrangement, as shown. According to the current example,each of the muxcapacitors 36 a, 36 b, 36 c can be designed to have aselected gain, such as a gain of 0.5, although they can be designed tohave any selected gain characteristics. The muxcapacitors are includedin the MxC200 power converters sold by Helix Semiconductor. In theillustrated example, the muxcapacitor 36 a is coupled in series with themuxcapacitors 36 b and 36 c, which in turn are connected in parallel.Further to this example, if the input voltage is for example 48V, thenthe output of the muxcapacitor 36 a is 24V at junction 38, and thisvoltage level is provided to the parallel connected muxcapacitors 36 band 36 c. The muxcapacitors 36 b, 36 c further reduce the voltage fromthe intermediate voltage of 24V to an output voltage of 12V. Those ofordinary skill in the art will readily recognize that the powerconverters can be constructed in any selected manner and that FIG. 2 isprovided for the sake of simplicity to illustrate the step downoperational characteristic of the converters. Further, the capacitorsand/or muxcapacitors can be connected in any suitable arrangementdepending upon the desired output voltage. The common input power line14 can supply the necessary operating power to the power converters. Themuxcapacitors are configured to store power therein.

The illustrated power conversion system 10 can employ any suitablenumber of power converters depending upon the type of loads 26 that areto be powered. For example, there can be as many as a 1000 powerconverters in larger power conversion systems or as few as five insmaller power conversion systems. According to one practice, the presentinvention contemplates arranging a suitable array 20 of power convertersto form a 1kW or higher power system. Specifically, multiple powerconverters are connected in the power converter array 20 to generate1000 W of power converted from 48 Vdc to 12 Vdc. Each of the illustratedpower converters 12 a, 12 b, 12 n in the array, for example, can bedesigned to reach peak efficiency at a selected power level, such as forexample between around about 2.0 W-13 about 6.0 W of power, and have amaximum power capacity across each converter of around 15 W.

The illustrated controller 30 is intended to control the powerconverters 12 a-12 n in the power converter array 20 so as to enable orturn on the appropriate number of power converters based on the powerneeds of the load 26. The controller 30 is adapted and configured tocontrol and turn ON or ENABLE the appropriate number of power converterswhile maintaining or achieving near peak power efficiency of the powerconverters in the power conversion system 10.

FIGS. 3 and 4 depict the details of the controller 30 and related systemcomponents. The controller 30 includes a signal conditioning unit 50 forconditioning the input power signal 42 generated by the input sensingcircuit 22 and the output power signal 44 generated by the outputsensing circuit 24. The sensing circuits 22 and 24 sense the input andoutput voltage and current on the power lines 14 and 16, respectively,and then generate output power signals in response thereto.Specifically, the voltage component (e.g., the sensed voltage) of thepower signals of the input and output power signals 42, 44 is conveyedto the voltage conditioning unit, which can include a voltage scalingand buffering unit 52, where the voltage is scaled and conditioned toremove any unwanted noise in the power signal and to scale the voltageto voltage levels suitable for use by the system components. Thesuitable voltage range can be in the range between about 0.0V and about3.3V. Similarly, the current component (e.g., sensed current) of thepower signals of the input and output power signals 42, 44 is conveyedto a current conditioning unit, such as the current sense gain andfiltering unit 54, where the current is sensed and filtered so as to besuitable for use by the analog-digital (A-D) converter 60. The currentsense gain and filtering unit 54 converts the input current signalsusing suitable current sense resistors, which output signals which inturn need to be amplified (i.e., gain) and filtered so as to be suitablefor use by the A-D converter 60. The filtering portion of the currentsense gain and filtering unit 54 employs a suitable filter, such as alow pass filter, to reduce the signal noise prior to being amplified.For example, the current sense gain and filtering unit 54 can employ aButterworth low pass filter for filtering the current signals, althoughother types of filters can also be employed.

The controller 30 also includes the A-D converter 60 that receives theoutput power signal 59 from the signal conditioner 50, which includesthe output signals 56, 58 from the voltage scaling and buffering unit 52and the current sense gain and filtering unit 54, respectively, andconverts these analog output signals into a digital output signal 62.The converted output signal 62 is introduced to a processor orprocessing unit 70. The processor 70 is configured to communicate withone or more memory units 72 and with a digital to analog (D-A) converter74. The processor 70 can include any suitable logic circuitry thatresponds to and processes instructions retrieved from the memory unit72. According to one practice, the processor 70 can be provided by acommercially available or custom designed microprocessor unit. Theprocessor 70 may utilize instruction level parallelism, thread levelparallelism, different levels of cache, and/or multi-core processors.The memory unit 72 is configured to store data and allow any storagelocation to be accessed by the processor 70. The memory unit 72 canstore software, signal information, and other executable instructionsfor use by the processor 70. The memory 72 can be a single memory moduleor can be implemented as a series of memory modules that can be in thecontroller or located throughout the system 10 or as part of hardware ornetworks that communicate with the power conversion system 10. Thememory 72 can be any suitable type of memory and can include volatileand/or non-volatile memory, examples of which include Dynamic randomaccess memory (DRAM) or any variants, including static random accessmemory (SRAM), Burst SRAM or SynchBurst SRAM (BSRAM), Fast Page ModeDRAM (FPM DRAM), Enhanced DRAM (EDRAM), Extended Data Output RAM (EDORAM), Extended Data Output DRAM (EDO DRAM), Burst Extended Data OutputDRAM (BEDO DRAM), Single Data Rate Synchronous DRAM (SDR SDRAM), DoubleData Rate SDRAM (DDR SDRAM), Direct Rambus DRAM (DRDRAM), or ExtremeData Rate DRAM (XDR DRAM), non-volatile read access memory (NVRAM),flash memory non-volatile static RAM (nvSRAM), Ferroelectric RAM(FeRAM), Magnetoresistive RAM (MRAM), Phase-change memory (PRAM),conductive-bridging RAM (CBRAM), Silicon-Oxide-Nitride-Oxide-SiliconSilicon (SONOS), Resistive RAM (RRAM), Racetrack, Nano-RAM (NRAM), orMillipede memory. The memory unit 72 may also include, but is notlimited to, RAM, ROM, EPROM, EEPROM, flash memory or other memorytechnology, CD-ROM, digital versatile disks (DVD) or other opticalstorage, magnetic cassettes, magnetic tape, magnetic disk storage orother magnetic storage devices, or any other non-transmission mediumthat can be used to store information for access by a computing device.In contrast, communication media may embody computer readableinstructions, data structures, program modules, or other data in amodulated data signal, such as a carrier wave, or other transportmechanism. As defined herein, “computer readable storage media” does notinclude communication media. Therefore, a computer storage or memorymedium should not be interpreted to be a propagating signal per se orstated as transitory in nature. The propagated signals may be present ina computer storage media, but propagated signals per se are not examplesof computer storage media, which is intended to be non-transitory.Although the memory unit 72 is shown within the controller 30, it willbe appreciated that the memory unit may be distributed or locatedremotely and accessed via a network or other communication link. Theprocessor 70 can communicate with the memory unit 72 via any suitablesystem bus.

The illustrated processor 70 can include a filter unit 80 for averagingthe power components (i.e., current and voltage) of the converted powersignal 62 received from the A-D converter 60. The filtered output signal82 is then conveyed to a power determination unit 84 that is configuredto determine the power and if desired the power efficiency of one ormore of the power converters or of the power conversion system 10 basedon the voltage and current components of the power signals. The powerdetermination unit 84 generates a power determination output signal 86that is introduced to a hysteresis unit 88. The hysteresis unit 88reduces chatter or noise on the output signal 90 that may adverselyaffect any clock signaling that occurs downstream in the system 10 bysetting the switching or threshold level in a selected direction at alevel different from the threshold level in the opposite direction. Thehysteresis unit helps prevent the rapid turning on and off (e.g.,chatter) of the power converters by the controller when the measuredpower levels are closely to or at the converter switching levels (e.g.,3.90 W in FIG. 13). The hysteresis unit 88 is applied after the power iscalculated by the power determination unit 88, and the hysteresis unitdoes not transmit the output signal 90 to the look up table (LUT) 92unless the calculated power changes by more than the hysteresis amountrelative to a previous power calculation. The controller employs the LUT92 in order to rapidly determine the proper power configuration of thepower conversion system 10. Specifically, the look up table determinesthe appropriate number of power converters 12 a-12 n in the powerconverter array 20 that should be operating in order to meet the powerdemands of the load 26 while concomitantly operating the powerconverters 12 a-12 n within a selected optimal power efficiency range.The LUT 92 can be a multi-dimensional table that correlates differenttotal power levels required by the load to a corresponding number ofpower converters that are operating. One example of a simplified versionof a look up table 92 suitable for use with the present invention isshown in FIG. 13. The illustrated look up table 92, which is exemplary,is directed to a two-dimensional look up table for a power convertersystem having a total power rating of about 20W. The 20W power convertersystem can consist of six power converters 12 a-12 n mounted in anyselected manner, such as for example across two separate circuit boards194 and 196, where each circuit board 194, 196 includes three of thepower converters. In the illustrated example table, the input variableis measured power 192, the outputs are control signals generated by thecontroller 30 that are sent to each circuit board that control how manypower converters are turned ON and operating with a fast clockfrequency, such as determined by the selection unit 110, FIGS. 6-7. Theillustrated look up table 92 includes a series of measured power metricsspanning along the 20 W power range of the system. As illustrated, ifthe board setting is 0, then all of the power converters associatedtherewith are running with a slow clock frequency and hence are turnedOFF or DISABLED, and if the setting is 1 then at least one of the powerconverters is turned ON and operating with the fast clock frequency,while concomitantly the other two power converters are on the slow clockfrequency and are turned OFF. In the look up table 92, for power systemlevels less than 3.9 W, all six of the power converters are turned OFFand operating at the slow clock frequency rate. As the power increases,the power converters associated with the first circuit board are turnedto the ON state one at a time. For example, for power levels between3.91-6.5 W, then a first of the power converters is turned ON; a secondpower converter is turned on at power levels between 6.51-9.1 W; and athird power converter is turned ON at power levels between 9.11-12.7 W.During this time, all of the power converters associated with the secondcircuit board are turned OFF and operating at the slow clock frequencyrate. For power levels above 12.71, in addition to the power convertersof the first circuit board, the power converters associated with thesecond circuit board are turned ON one at a time as the power increases.The power converters are preferably switched ON and operated in theirrespective optimal power efficiency range prior to another one of thepower converters being turned ON. That is, the controller 30 maintainsthe ON state of the power converters when operating in the optimal powerefficiency range, and turns on additional power converters when the loadrequires additional power and the ON power converters would operateoutside of the optimal power efficiency range. Those of ordinary skillin the art will readily recognize that the look up table 92 can have anysuitable format or configuration based on the total power of the system,the number of power converters that are employed, as well as the numberof circuit boards or blades are employed to electrically mount the powerconverters. The processor 70 can also include a universal asynchronousreceiver-transmitter (UART) device 98 for receiving g instructions froma user according to any suitable communication methodology, such asthrough a serial interface (e.g., universal serial bus (USB)). One ofordinary skill in the art will readily recognize that the processor 70can include or implement the functionality of any of the components ofthe illustrated controller 30 and that the configuration illustrated inFIG. 3 is merely one illustrative example of a suitable configuration.

The controller based on the information stored in the look up table(LUT) 92 generates a pair of output signals, such that the output signal94 is transmitted to a selection unit 110 for adjusting a frequency,such as a clock rate frequency, of one or more of the power converters12 a-12 n, and the output signal 96 is introduced to a digital to analog(D-A) converter 74 where the signal is converted from a digital signalto an analog signal, which is then transmitted to a comparison unit 120for addressing load power situations that require a rapid response time.One of ordinary skill in the art will readily recognize that thecontroller can generate a single output signal rather than multipleoutput signals and can be generated in a series manner rather than inthe indicated parallel manner.

According to the current embodiment, the illustrated power converters 12a-12 n have an operating power load range of about 0 W to about 15 W,and the power converters are configured to reach near peak operatingpower efficiency of about 97% at about 2.6 W of rated load power. Asshown in FIG. 5, each of the power converters 12 a-12 n has anassociated power efficiency profile relative to the load current acrossthe converters that are turned ON and which corresponds to the powerrequired by the load, which is graphically illustrated. As shown in thegraph 100, each of the power converters are capable of attaining peakpower efficiency when providing relatively low load currents to the load26. The power converter can achieve peak power efficiency of about 97%at between about 0.25-0.30 amps current load, which is equivalent toabout 2.6 W of rated load power. As is also shown, each of the powerconverters are capable of sustaining above 90% power efficiency acrossnearly the entire rated power range of the converter. As used herein,the term “optimal power efficiency range” is intended to mean aconverter power efficiency and/or a system power efficiency of aboveabout 90%, and preferably above about 95%. The foregoing range alsocontemplates operating each of the power converters 12 a-12 n such thatthe power across each converter is in the range of between about 2.0 Wand about 6.0 W, and preferably between about 2.5 W and about 5.0 W. Thepower levels can be easily correlated to load current levels as setforth in the graphs of FIGS. 5, 8 and 10 according to known electricalconversion techniques. One of ordinary skill in the art will readilyrecognize that the power converters can be operated outside of theiroptimal power efficiency range depending upon the specific type of powerconverter that is employed in the array 20. When operating as such, thepower converters sacrifice efficiency for density (e.g., more wattageper cubic centimeter), and hence more power per power converter.

The power conversion system 10 of the present invention can also includea clock selection unit 110 and an optional comparison unit 120, as shownin FIGS. 6 and 7. Like reference numerals refer to like componentsthroughout the various views unless otherwise indicated. The clockselection unit 110 receives the output signal 94 generated by thecontroller 30 and is configured to select one or more parameters of thepower conversion system, such as for example the operating frequency ofone or more of the power converters 12 a-12 n within the power converterarray 20. The clock selection unit 110 allows the system or user toselect or optimize the number of power converters 12 a-12 n that areoperating at selected frequencies. According to one practice, the clockselection unit 110 can be configured to select the operating clock ratefrequencies of one or more of the power converters 12 a-12 n byselecting an initial or first clock rate frequency that ENABLES or tunsON the power converter and a second lower clock rate frequency thatDISABLES or turns OFF the power converter. As such, the controller 30through the clock selection unit 110 can turn ON and OFF selected powerconverters 12 a-12 n during use. Based on the size of the initial load26, the controller 30 determines the appropriate number of powerconverters to operate that are capable of handling the powerrequirements of the load 26 based on the information stored in the LUT92 while concomitantly operating the power converters 12 a-12 n withinthe optimal power efficiency range. The processor 70 of the controller30 determines the number of power converters to be turned ON or ENABLEDby accessing the LUT 92. As shown in FIG. 7, the clock selection unit110 can include a clock generator 112 and a selector 114. The clockgenerator 112 generates a clock frequency signal that is transmitted tothe selector 114. The selector 114 also receives the output signal 94from the controller 30. The illustrated clock generator 112 can belocated within the clock selection unit or can be located at otherlocation within the system, such as in the power converter array 20. Theclock selection unit can employ a single clock generator for generatinga first or higher clock frequency (e.g., 200 kHz) which can be reducedby the clock selection unit if desired to a second lower frequency(e.g., 100 kHz). Alternatively, the clock generator 112 can includemultiple clock generators for generating separate clock signals atdifferent frequencies (e.g., 100 kHz and 200 kHz). According to oneembodiment, the clock selection unit 110 along with the controller 30can set the clock rate frequencies of one or more power converters to anENABLE or ON clock rate frequency and the remaining portion of the powerconverters to a second lower DISABLE or OFF clock rate frequency (e.g.,off or stand by mode). Those of ordinary skill in the art will readilyrecognize that the clock rate frequencies can be set to any selectedrange of frequencies depending upon the type of power convertersemployed in the system and the arrangement of the power conversionsystem 10, as well as the size of the load 26. According to oneembodiment, the clock rate frequency can be in the range between about 0kHz and about 250 kHz. More specifically, the ON clock rate frequencycan be either about 100 kHz or about 200 kHz and the OFF clock ratefrequency can be about 50 kHz. The OFF clock rate frequency also ensuresthat although the power converters are turned OFF, the capacitors36a-36c within the power converters 12 a-12 n are still charged.Further, the ON clock rate frequency is sufficient to effectivelyachieve optimal or maximum efficiency of the power converters for agiven load 26. The selection unit 110 can employ any suitable electroniccircuits to assist in the receipt of output signals from the controller30 and to perform the appropriate frequency selection, and can includeone or more of multiplexers, comparators, FPGAs, and the like. Theoperational characteristics of these components is well known in theart.

FIG. 8 sets forth an example of two exemplary clock rate frequenciesthat are suitable for turning ON the power converters 12 a-12 n. Thegraph 130 illustrates the power efficiency curves of the powerconverters relative to the load current across each operating powerconverter as required by the load 26 for clock rate frequencies of 100kHz and 200 kHz. The graph 132 for the 100 kHz frequency illustratesthat the power converters operating on this frequency achieve relativelypeak or optimal power efficiency at lower required load currents. Thegraph 134 for the frequency of 200 kHz shows that the power convertersreach peak or optimal power efficiency at larger required load currentsbut maintain higher power efficiency rates over a broader range of loadcurrents. As such, depending upon the type of power converters employedin the system and the size of the load 26, the power conversion system10 can select either or both the 100 kHz frequency or the 200 kHzfrequency, both of which serve to turn ON the power converters.According to one operational example, the selection unit 110 can selectthe 100 kHz frequency for the power converters when the load current isbetween about 0.0 A and about 0.5 A per power converter, and then switchto the higher 200 kHz frequency for load currents between about 0.5 Aand about 1.5 A per power converter. In this example, the controller 30controls or operates the power converters at the lower 100 kHz frequencyuntil all of the power converters are turned ON and running up to about0.5 A required current load per power converter. When this occurs, thecontroller 30 through the selection unit 110 increases the frequency to200 kHz on selected power converters as the load current per powerconverter rises above the 0.5 A level. As such, the controller 30 candynamically change the operating frequency of the power converters as afunction of the load 26, where the lower frequency is employed atrelatively low loads and the higher frequency at higher loads, so as tooperate the power converters within the optimal power efficiency range.The frequency ranges and preferences can be stored in the memory 72 ofthe system 10 or controller 30, and the controller 30 can implement theproper clock frequency based on the instructions stored therein.

The power conversion system 10 of the present invention can also employan optional comparison unit 120 that functions as an instantaneousresponse or limited reserve (ILR) circuit for providing momentary andnearly instantaneous power to the load 26 if the power required by theload increases relatively quickly and in such a manner that the normaloperating duty cycle of the controller would be too slow or delayed toadequately turn ON the power converters to supply power to the load 26.As shown, the comparison unit 120 receives the instantaneous powersignal 59 from the controller 30 which provides information regardingthe instantaneous current and voltage requirements of the load 26 aswell as information associated with the input power. The comparison unit120 also receives the output signal 96 from the controller 30 whichfunctions as a power threshold signal for the comparison unit. Thecomparison unit 120 serves to compare the instantaneous power signal 59with the threshold output signal 96, and when the value associated withthe power signal 59 is greater than the value associated with the outputsignal 96, the system 10 by-passes the controller 30 and sends a signalvia the selection unit 110 to the power converter array 20 to provide aninstantaneous power supply from the power converter array 20 to the load26. As shown in FIGS. 3 and 6, the instantaneous power signal 59 isgenerated prior to introduction to the processor 70 of the controller30. As such, the signal 96 is time delayed by the various processingthat occurs within the processor 70 and outside of the processor by, forexample, the filter 80, power determination unit 84, hysteresis unit 88and LUT 92. When the instantaneous power signal 59 is greater than thethreshold power level as supplied by the output signal 96 and asdetermined by the controller 30, the power conversion system 10 requiresthat additional power be supplied by the power converter array 20 to theload 26. However, in certain circumstances, this power needs to besupplied to the load 26 in a time period that is faster than thecontroller 30 can provide instructions to the power converter array 20to provide the necessary power to the load by turning on additionalpower converters. As such, the comparison unit 120 by-passes thecontroller 30 and generates an output signal 122 that is transmitted tothe selection unit 110, which in turn transmits an output signal 116 tothe power converter array 120. When the output signal 116 is received bythe power converter array 20, the power converters that are in the OFFstate provide the stored or reserve energy from the internal capacitors36 a-36 c directly to the load 26. The rapid response energy provided bythe power converter array provides temporary additional power to theload 26 while the controller 30 processes the input information from thesystem 10 to determine the appropriate number of power converters toswitch to the ON state to provide a sustainable and more durable sourceof power to the load 26 to meet the current load power requirements.According to one practice, the controller 30 can switch all of the powerconverters 12 a-12 n in the array 20 into the ON state to provide powerto the load 26 and then determine the appropriate number of powerconverters to switch to the OFF state based on real time load powerrequirements. The comparison unit 120 can employ any suitable type ofelectronic components to effectuate the comparison operation, and caninclude for example a comparator, a multiplier and the like, and can beimplemented using analog or digital components or a combination of both.

The power conversion system 10 of the present invention is scalable tohigh power and voltage levels (e.g., >1 kW). The power conversion array20 converts the input power with relatively high power efficiency (at orabove 97%) at relatively low power levels. The power conversion system10 also employs a power converter array 20 that provides high powerdensity due to the elimination of inductive devices, including bulky andinefficient transformers.

In operation, the input power is supplied to the power line 14 from asuitable power source (not shown) and hence to the converter array 20and the power converters 12 a-12 n forming the array. The powerconverters are preferably DC-DC power converters that step down orreduce the voltage from an input level (e.g., 48V) to a suitable outputlevel (e.g., 12V) at the output power line 16. The output power issupplied to a load 26. The input sensing circuit 22 measures, senses ordetects the input voltage and current using well known detectors and theoutput sensing circuit measures, senses or detects the output voltageand current using well known detectors. The input and output powerinformation generated by the sensing circuits 22, 24 are supplied to thecontroller 30.

As the power conversion system 10 moves from a no-load (0.0 W) state orcondition and then starts increasing the power supplied to the load 26,the system begins with a power converter 12 a initially turned ON orENABLED. The first power converter 12 a reaches peak or optimalefficiency of approximately 97% at about 2.6 W and maintains the powerefficiency thereabouts until about 6.0 W. Hence, the optimal efficiencypower range suitable for operating the power converters is between about2.5 W and about 6.0 W across each power converter.

Although the first or initial power converter 12 a can handle powerabove 6.0 W, the power converter no longer operates in the optimal powerefficiency range. When the power supplied by the power converter reachesa certain power level (e.g., about 5.0 W), the controller 30 turns ON orENABLES a second power converter 12 b to help share the power load andto provide power to the load 26. The power conversion system 10 turns onthe appropriate number of power converters 12 a-12 n such that eachpower converter is operating within the optimal power range, and henceis operating at peak or near peak efficiency.

FIG. 9 is a schematic flow chart diagram illustrating at least a portionof the method of the present invention. The power conversion system 10employs the input sensing circuit 22 and the output sensing circuit 24to sense the input and output voltage and current (e.g., power), step140. The current and voltage information is supplied to the controller30. The controller 30 then monitors and determines the power needs ofthe load 26 via the output current and voltage sensed by the outputsensing circuit 24, step 142. The controller then ENABLES or turns ONone or more of the power converters 12 a-12 n of the power converterarray 20, step 144, so as to supply the necessary power to the load 26.The controller 30 also determines the frequency of operation of thepower converters via the controller 30 and the selection unit 110, FIG.6. The controller 30 then determines whether the power converters 12a-12 n are operating within the optimal power efficiency range bymonitoring the power across each of the power converters, step 146. Ifthe power converters are not operating in the optimal power efficiencyrange, then the controller controls the number of power converters thatare operating, step 148. For example, if the power is above the optimalpower efficiency range, then the controller turns ON a selected numberof additional power converters. If the power across is each converter isbelow the optimal power efficiency range, then the controller turns OFFa selected number of power converters. If the power converters areoperating within the optimal power efficiency range, then the controller30 maintains the number of power converters that are operating, step150. The illustrated process can be continued one power converter at atime up until the maximum number of converters in the array 20 aredeployed. Using the adaptive dynamic efficiency optimization (ADEO)methodology of the present invention, all of the power convertersstarting with the second converter are operating in the optimal powerefficiency range. This approach eliminates the traditional efficiencycurve for power converters and allows the power conversion system 10

AGLW-001CN to operate at or very close to peak efficiency at any pointin the rated load range above 2.6 W, which is equal to about 0.26% ofrated load in a 1 kW design.

As shown in FIG. 10, the power efficiency curve of the system 10 of thepresent invention is compared with that of a conventional magnetic orinductive based power converter system as well as to the system 10 ifthe power converters are operated without the adaptive dynamicefficiency optimization control of the present invention. The powerefficiency curve 160 of the present invention when operating under theadaptive dynamic efficiency optimization method as implemented andcontrolled by the controller 30 is capable of reaching near or at peakoperating efficiency of about 97% at less than about 1% of rated powerload. When the power converters 12 a-12 n are switched OFF and ON by thecontroller 30 so as to maintain them in their respective optimal powerefficiency range, the power efficiency curve 160 is maintained in theoptimal power efficiency range. In contrast, the power efficiency curve164 of the system 10 when operated without ADEO shows that the system 10does not reach the peak efficiency level of the system 10 with the ADEOcontrol, and reaches a peak power efficiency level at higher loadcurrent levels. The power efficiency curve 168 representative of a powerconversion system employing magnetic type power converters without theADEO of the present invention also shows that the system reaches peakefficiency at levels lower than the other systems and at higher loadcurrents.

Optionally, the power conversion system 10 of the present invention canalso select or vary the operating frequency of each of the powerconverters during use. As shown in FIG. 11, the system 10 initialdetermines the size of the load by monitoring the power requirements ofthe load 26 with the output sensing circuit 24, step 170. The controller30 can determine the power requirements of the power converter array 20by referencing the power table stored in the LUT 92. The controller canselect the appropriate clock rate frequencies to operate the powerconverters based on pre-stored instructions, step 172. The system canthen monitor the current required by the load to ascertain the powerrequirements thereof, and based on this information, the controller candetermine if the load current is below a selected threshold level (e.g.,0.5A), step 174. If the load current is below the threshold level, thenthe system can maintain the current frequency (e.g., 100 kHz) of thepower converters 12 a-12 n. If the load current is above the thresholdlevel, then the controller 30 can adjust or change the frequency level(e.g., 200 kHz) of the power converters, step 176.

The instantaneous limited reserve (ILR) feature of the power conversionsystem 10 of the present invention is shown for example in FIGS. 6 and12. The system 10 via the input and output sensing circuitry 22 and 24and the controller 30 determines the instantaneous power at the inputand the output power lines 14, 16, step 180. The controller 30 thendetermines the power requirements of the load, step 182, and sendscontrol signals to the power converter array to supply power to theload. The comparison unit 120 can then compares the instantaneous powersignal 59 and if desired any values associated therewith with the powercontrol signal 96 generated by the controller 30, step 184. The powercontrol signal 96 operates as a threshold value for the comparison unit120. The comparison unit 120 then determines whether the instantaneouspower value of the signal 59 is greater than the threshold value 96,step 186. If the instantaneous power value is not greater than thethreshold value, then the system continues to monitor and determine theinstantaneous power values. If, on the other hand, the instantaneouspower value 59 is greater than the threshold value 96, then thecomparison unit 120 generates an output signal 122 that is transmittedto the selection unit 110, which in turn by-passes the controller 30 andsends a signal to the power converter array 20 instructing the powerconverters in the OFF state or mode to discharge any stored power to theoutput power line 16, step 188. This instantaneous power is provided tothe load 126 and provides an initial power boost while the controller 30determines the appropriate number of power converters 12 a-12 n to turnto the ON state.

It will thus be seen that the invention efficiently attains the objectsset forth above, among those made apparent from the precedingdescription. Since certain changes may be made in the aboveconstructions without departing from the scope of the invention, it isintended that all matter contained in the above description or shown inthe accompanying drawings be interpreted as illustrative and not in alimiting sense.

It is also to be understood that the following claims are to cover allgeneric and specific features of the invention described herein, and allstatements of the scope of the invention which, as a matter of language,might be said to fall therebetween.

Having described the invention, what is claimed as new and desired to besecured by Letters Patent is:

I claim:
 1. A system for controlling a plurality of power converters ina power system for supplying power to a load, comprising a plurality ofswitched capacitor type power converters forming an array for convertingpower between a first power level and a second power level whenoperating, wherein the plurality of switched capacitor type powerconverters are arranged in parallel relative to each other and whereineach of the switched capacitor type power converters has a plurality ofcapacitors for storing power, an input power line coupled to an input ofeach of the plurality of power converters on an input side for providinginput power at the first power level, an output power line coupled to anoutput of each of the plurality of power converters on an output sidefor providing output power to a the load at the second power level, acontroller coupled to the outputs of the plurality of power convertersfor controlling a power output of the plurality of power converters, aninput sensing circuit coupled to the input power line and to thecontroller for sensing the input power on the input power line andtransmitting an input power signal to the controller, and an outputsensing circuit coupled to the output power line and to the controllerfor sensing the output power on the output power line and transmittingan output power signal to the controller, wherein the controller isconfigured to control each of the plurality of power converters so as toselectively turn one or more of the plurality of power convertersbetween an ON state at a first clock frequency so as to supply power tothe load, and an OFF state at a second lower clock frequency where thepower converter does not transmit power to the load and remainsoperative so as to charge the plurality of capacitors associatedtherewith, wherein the plurality of power converters are controlled as afunction of the sensed input power and the sensed output power such thatone or more of the plurality of power converters in the ON state areoperating in an optimal power efficiency range, wherein the controllercomprises a processor, a look up table, and a memory for storinginstructions for controlling the plurality of switched capacitor typepower converters such that when received by the processor, instructs theprocessor to: determine the power across one or more of the plurality ofpower converters, and based on the power of the one or more powerconverters, accessing the look up table and determining therefrom whichof the plurality of power converters the controller places in the ONstate and the OFF state, and wherein the look-up table is configured forstoring information associated with a plurality of power levels acrossat least one of the plurality of power converters correlated to aplurality of power converters to be placed in the ON state or the OFFstate, wherein the information in the look-up table includes the numberof the power converters of the plurality of power converters to beplaced in the ON state based on a plurality of different power levelsassociated with the load while operating the plurality of powerconverters in the ON state in the optimal power efficiency range.
 2. Thesystem of claim 1, wherein each of the plurality of switched capacitortype power converters comprises a switched capacitor type DC-DCstep-down power converter for converting the power from the first powerlevel to the second power level, where the second power level is lowerthan the first power level.
 3. The system of claim 1, wherein each ofthe plurality of switched capacitor type power converters comprises aDC-DC power converter, a DC-AC power converter, or a AC-DC powerconverter.
 4. The system of claim 1, wherein the plurality of capacitorsare electrically connected in a parallel arrangement, a serialarrangement, a parallel-serial arrangement, or a series-parallelarrangement.
 5. The system of claim 1, wherein the controller furthercomprises a signal conditioner for conditioning the input power signaland the output power signal and generating a conditioned output powersignal representative of the instantaneous input power and output power,and an AC-DC converter for converting the conditioned output powersignal to a DC conditioned output power signal, wherein the processor isconfigured for processing the DC conditioned output power signal and forgenerating based on the stored instructions controller output signalsfor controlling one or more of the plurality of switched capacitor typepower converters so as to turn the plurality of switched capacitor typepower converters into the ON state and the OFF state, wherein the inputpower signal has an input voltage component and an input currentcomponent and the output power signal has an output voltage componentand an output current component, and wherein the signal conditionerfurther includes a voltage conditioning unit for buffering the inputvoltage component and the output voltage component to remove noisetherefrom and to scale the input voltage component and the outputvoltage component to a selected voltage level for use by the controller,and a current conditioning unit for filtering the input currentcomponent and the output current component.
 6. The system of claim 5,wherein the conditioned output power signal has a conditioned outputvoltage component and a conditioned output current component, andwherein the processor comprises a filter unit for averaging theconditioned output voltage component and the conditioned output currentcomponent of the conditioned output power signal, a power determinationunit for determining the power across one or more of the plurality ofpower converters based on an average of the conditioned output voltagecomponent and the conditioned output current component and generating apower determination output signal, and a hysteresis unit for reducingnoise in the power determination output signal and for passing the powerdetermination output signal to the look-up table only when the powerchanges by more than a hysteresis amount.
 7. The system of claim 6,wherein the controller generates one or more output control signals forturning a selected one or more of the plurality of switched capacitortype power converters into the ON state and the OFF state based on thepower requirements of the load as correlated to the plurality ofswitched capacitor type power converters and associated power levels inthe look-up table, and based on operating the plurality of switchedcapacitor type power converters in the ON state in the optimalefficiency range.
 8. The system of claim 7, wherein the power levelsacross at least one of the plurality of power converters correspond tothe power requirements of the load.
 9. The system of claim 5, whereinthe current conditioning unit comprises a low pass filter for filteringthe input and output current components.
 10. The system of claim 6,further comprising a clock selection unit coupled to the controller andto the plurality of power converters for varying a frequency of one ormore of the plurality of power converters between the first clockfrequency for placing the power converter in the ON state and the secondclock frequency for placing the power converter in the OFF state, and acomparison unit coupled to the controller and to the clock selectionunit for receiving the conditioned output power signal and the powerdetermination output signal generated by the power determination unit.11. The system of claim 1, wherein the first selected clock frequencyfor placing the power converter in the ON state is 100 kHz or 200 kHzand the second selected clock frequency for placing the power converterin the OFF state is 50 kHz.